There is a growing demand for GPS tracking systems with low-power consumption, millimeter scale form factor and high performance. Interest in these systems is being driven by a desire for a smaller form factor and increased energy efficiency for the applications, such as smart watches, wearable devices, asset trackers, and drones. Despite the interest in GPS tracking systems, one of their main limitations is power consumption. Most GPS tracking systems run continuously, leading to relatively high power consumption. This comes at a cost of limited life time of GPS tracking systems, particularly, those with a Li-ion battery and small form factors. A number of solutions to prolong the lifetime have been offered, including the use of GPS loggers which designed to log the position over time at regular interval in its internal memory. The GPS logger can reduce the average power significantly through heavy duty-cycling. When duty-cycling is used, the stream of data is collected in a SRAM and transferred to a flash during the reception time. In this process, the correlation of the data is processed at the base station after the data is retrieved.
FIG. 1 depicts an example of a GPS logger 10. The analog front-end (AFE) is specifically designed for the application of a fully integrated, miniaturized GPS logger. As shown in FIG. 1B, the system includes an analog front-end 11, correlator 12, flash memory 13, battery 14 and antenna 15 with a volume of a 10×10×3 mm3 volume. The AFE uses sparse duty cycling that turns on for 100 ms every hour. The AFE boots up and shuts down in 20 us, minimizing the energy overhead from startup. After the GPS AFE is shut down, an off-chip correlator calculates the updated time and position and passes the result to the rest of the mm-scale system. Since highly accurate time is kept, the AFE can also turn on precisely when new satellite ephermerides are broadcast; and sleep during the rest of the transmission.
This disclosure introduces a fully integrated energy efficient GPS AFE designed for heavy duty cycling to reduce average power.
This section provides background information related to the present disclosure which is not necessarily prior art.